Reinventing HPC

Research Paper Submission

The research papers sessions provide great opportunities for engineers and scientists from academia, industry, and government to come together and exchange ideas on significant topics, trends, and discoveries that shape the future of high performance computing (HPC), machine learning, data analytics, and quantum computing.

Please note: the Call for Research Paper is closed!

ISC 2024 Research Paper Chair Jeff Hammond

Research Paper Chair
Jeff Hammond, Nvidia, Finland

Research Paper Deputy Chair
Amanda Randles, Duke University, USA

Proceedings Chair
Carola Kruse, CERFACS, France

Proceedings Deputy Chair
Tobias Weinzierl, Durham University, UK

The ISC organizers will again sponsor the Hans Meuer Award, which recognizes the most outstanding research paper, selected by members of the research papers committee. The award includes a cash prize of 3,000 Euros for the paper’s authors.

IEEE XploreNEW at ISC 2024, accepted papers will be submitted for inclusion as fully open access in the IEEE Xplore Digital Library.

Information for speakers: Please look at our Speaker Manual, which provides guidance and information in preparing and delivering your upcoming presentation at ISC 2024.


  Full Submission Deadline closed
  Author Rebuttals Saturday, January 27 - Wednesday, January 31, 2024
  Notification of Acceptance Friday, February 16, 2024
  Camera-Ready Submission Monday, March 18, 2024 11:59 pm AoE
  Short pre-recorded Video due Monday, April 22, 2024 11:59 pm AoE
  Final Presentation Slides in PDF due Wednesday, May 8, 2024 11:59 pm AoE
  Research Paper Sessions Monday, May 13 – Wednesday, May 15, 2024

ISC will grant a complimentary
conference pass to one author per accepted poster.
Registration fees will be published in early 2024.


ISC 2024 Call for Research Paper


The Research Paper Committee encourages the submission of high quality papers reporting original work in theoretical, experimental, and industrial research & development. The ISC submission process will be divided into six topic areas. Submitters must indicate a first and a second topic in the submission process.

System Architecture & Hardware Components

  • Beyond Moore's Law
  • Composable Disaggregated Infrastructure
  • Data Center Infrastructure and Cooling
  • Emerging Computing Technologies
  • Extreme-scale Systems
  • Heterogeneous System Architectures
  • Interconnects and Networks
  • Memory Technologies and Hierarchies
  • Storage Technologies and Architectures
  • Sustainability and Energy Efficiency

Programming Environments & System Software

  • Compiler and Tools for Parallel Programming
  • Domain-specific Languages and Code Generation
  • Energy Management
  • HPC in the Cloud and HPC Containers
  • Parallel File Systems
  • Parallel Programming Languages
  • Resource Management and Scheduling
  • Robustness and Resilience
  • Runtime Systems for HPC
  • Scalable Application Frameworks
  • System and Performance Monitoring

Algorithms, Methods & Tuning

  • Extreme-scale Algorithms
  • Mixed Precision
  • Novel Algorithms
  • Numerical Libraries
  • Optimizing for Energy and Performance
  • Performance and Resource Modeling
  • Performance Measurement
  • Performance Tools and Simulators

Applications & Use Cases

  • Application Workflows for Discovery
  • Bioinformatics and Life Sciences
  • Chemistry and Materials Science
  • Computational Physics
  • Earth, Climate and Weather Modeling
  • Engineering
  • Geosciences
  • Industrial Use Cases of HPC, ML and QC
  • Visualization and Virtual Reality

Machine Learning & AI

  • AI Applications powered by HPC Technologies
  • Digital Twins and ML
  • High-Performance Data Analytics
  • HPC Simulations enhanced by Machine Learning
  • HPC System Design for Scalable Machine Learning
  • Large Language Models and Generative AI in HPC
  • ML Systems and Tools

Quantum Computing

  • Integration of Quantum Computing and HPC
  • Quantum Computing - Basics and Theory
  • Quantum Computing - Technologies and Architectures
  • Quantum Computing - Use Cases
  • Quantum Program Development and Optimization
  • Quantum-inspired Algorithms and Technologies

Note: Submissions on other innovative aspects of high performance computing are also welcome.



Submission Guidelines

  • NEW at ISC 2024, accepted papers will be submitted for inclusion as fully open access in the IEEE Xplore® Digital Library.

    IEEE Xplore

  • Upload your research paper in PDF format, up to 10 pages (Update: references don’t count in the page limit). Use the Double-column text using the single-spaced 10-point font on 8.5×11-inch pages. IEEE strongly encourages use of the conference manuscript templates provided on their website.
  • ISC 2024 will use a double-blind review process (see ISC High Performance Double-Blind Review Guidelines)
  • Papers submitted for the Research Papers track should not have been previously published or under review for a different venue

Note that a membership on a program committee does not inherently create a conflict of interest to submit a paper.

Review Process

  • Each paper is expected to receive a minimum of 3 to 4 reviews
  • Double-blind peer-review will be used
  • Papers will be evaluated based on novelty, fundamental insights, clarity of presentation, and potential for long-term impact
  • Reviewers will provide constructive, actionable feedback that can be used to improve the paper, whether it is eventually accepted or not

The Research Paper Committee reserves the right to reject incorrectly formatted papers.

Rebuttal phase (January 27-31,2024)

  • Initial reviewer comments will be made available to authors
  • Authors can respond to clarify misunderstandings and answer questions
  • Rebuttals will be submitted in written format and will have a tight deadline
  • Authors will receive additional instructions via email

Final decision (February 16, 2024)

  • All reviews and rebuttals will be considered by the paper’s track committee
  • Live reviewer discussions will occur during the research paper committee meeting
  • A consensus-driven approach will be used to select the strongest papers
  • Notification of the papers’ outcomes will be sent to authors after the program committee’s meeting



  • ISC 2024 is planned as an in-person conference from May 12 to May 16, 2024, in Hamburg, Germany. By submitting a research paper, the submitter agrees that one of the authors of the paper will present the work at ISC 2024 in Hamburg, Germany. For unforeseen circumstances that would prevent the chosen speaker from attending the event, the submitter/speaker should contact ISC organizers and the research paper chair as soon as possible to discuss different options.
  • The research paper sessions will be held from Monday, May 13, through Wednesday, May 15, 2024
  • Every paper presenter needs to submit a short, pre-recorded summary video of the paper prior to the conference
  • Presentation slides will be available within the event platform for registered attendees only
  • Paper presenters need to be registered ISC 2024 participants. For accepted papers, one author is eligible for a complimentary conference participation pass
  • Travel, accommodation, registration fees for other authors, and other such expenses will not be covered by the ISC organizers

Conference Proceedings

NEW at ISC 2024, accepted papers will be submitted for inclusion as fully open access in the IEEE Xplore Digital Library.

Presentation Materials For Attendees

The ISC organizers will make the presentation materials (short video and slides) available within the event platform for registered attendees only.

  • Jeff Hammond, NVIDIA, Finland (Chair)
  • Amanda Randles, Duke University, United States of America (Deputy Chair)

Algorithms, Methods & Tuning

  • Hatem Ltaief, KAUST, Saudi Arabia (Chair)
  • Ahmad Abdelfattah, University of Tennessee, United States of America
  • Sameh Abdulah, KAUST, Saudi Arabia
  • Qinglei Cao, Saint Louis University, United States of America
  • Kate Clark, NVIDIA, United States of America
  • Aimad Er-Raiy, Airbus, France
  • Aniello Esposito, HPE, Switzerland
  • Huda Ibeid, Intel, United States of America
  • Mathias Jacquelin, Cerebras Systems, United States of America
  • Kamer Kaya, Sabancı University, Turkey
  • Xinhua Lin, Shanghai Jiao Tong University, China
  • Lena Oden, Fernuniversität in Hagen, Forschungszentrum Jülich GMBH, Germany
  • Jesmin Jahan Tithi, INTEL CORP, Intel, United States of America
  • Miwako Tsuji, RIKEN, AHUG, Japan
  • Ichitaro Yamazaki, Sandia National Laboratories, United States of America

Applications & Use Cases

  • Bronson Messer, Oak Ridge National Laboratory, United States of America (Chair)
  • Reuben Budiardja, Oak Ridge National Laboratory, United States of America
  • Peter Coveney, UCL, University of Amsterdam, United Kingdom
  • Anshu Dubey, Argonne National Laboratory, University of Chicago, United States of America
  • Ian Karlin, NVIDIA, United States of America
  • Christopher Knight, Argonne National Laboratory, United States of America
  • Nicholas Malaya, AMD, United States of America
  • Bronson Messer, Oak Ridge National Laboratory, United States of America
  • Ramesh Pankajakshan, Lawrence Livermore National Lab, United States of America
  • Scott Parker, Argonne Leadership Computing Facility, United States of America
  • Markus Rampp, Max Planck Computing & Data Facility, Germany
  • Christine Simpson, Argonne Leadership Computing Facility, United States of America
  • Tjerk Straatsma, ORNL, United States of America

Machine Learning & AI

  • Sofia Vallecorsa, CERN, Switzerland (Chair)
  • Vishakha Agrawal, SiFive, United States of America
  • Maxwell Cai, Intel, Leiden University, Netherlands
  • Renato Cardoso, CERN, Switzerland
  • Adel Chaibi, Intel, France
  • Nadya Chernyavskaya, Predictive Layer, Switzerland
  • Nikoli Dryden, Lawrence Livermore National Laboratory, United States of America
  • Tobias Grosser, University of Edinburgh, United Kingdom
  • Pratik Jawahar, University of Manchester, France
  • Vladimir Loncar, MIT, United States of America
  • Lukasz Miroslaw, Microsoft, Switzerland
  • Diana Moise, Cray, HPE, Switzerland
  • Bogdan Nicolae, Argonne National Laboratory, United States of America
  • David Ojika, University of Florida, United States of America
  • Piyush Raikwar, CERN, Switzerland
  • Vikram A. Saletore, Intel Corporation, United States of America
  • Edgar Solomonik, University of Illinois at Urbana-Champaign, United States of America
  • Mudhakar Srivatsa, IBM, United States of America
  • Kyongmin Yeo, IBM, United States of America

Programming Environments & System Software

  • Tom Deakin, University of Bristol, United Kingdom (Chair)
  • Sunita Chandrasekaran, University of Delaware, United States of America
  • Biagio Cosenza, University of Salerno, Italy
  • Johannes Doerfert, Lawrence Livermore National Laboratory, United States of America
  • Yehia Elkhatib, University of Glasgow, United Kingdom
  • Bilel Hadri, KAUST Supercomputing Laboratory, Saudi Arabia
  • Georg Hager, University of Erlangen-Nuremberg, Erlangen Regional Computing Center, Germany
  • Guido Juckeland, Helmholtz-Zentrum Dresden-Rossendorf (HZDR), Germany
  • Pekka Jääskeläinen, Tampere University, Intel Finland Oy, Finland
  • Pouya Kousha, The Ohio State University, United States of America
  • John Linford, NVIDIA, United States of America
  • Glenn Lockwood, Microsoft Corporation, United States of America
  • James Richings, Edinburgh Parallel Computing Centre (EPCC), United Kingdom
  • Roxana Rusitoru, Arm, United Kingdom
  • Sameer Shende, University of Oregon; ParaTools, Inc., United States of America
  • Osman Seckin Simsek, University of Basel, Switzerland

Quantum Computing

  • Stefan Knecht, AlgorithmiQ, Finland (Chair)
  • Ayush Asthana, University of north dakota, United States of America
  • Werner Dobrautz, Chalmers University of Technology, Sweden
  • Luigi Iapichino, Leibniz Supercomputing Centre, Germany
  • Jeanette Lorenz, Fraunhofer Institute for Cognitive Systems IKS, LMU Munich, Germany
  • Stefano Mensa, The Hartree Centre, STFC, United Kingdom
  • Stephan P. A. Sauer, University of Copenhagen, Denmark
  • Francesco Tacchino, IBM Research Zürich, Switzerland
  • Ivano Tavernelli, IBM, Swaziland
  • Phillip Wagner Kastberg Jensen, University of Copenhagen, Denmark

System Architecture & Hardware Components

  • Samantika Sury, Samsung Semiconductor Incorporated, United States of America (Chair)
  • Eric Borch, Samsung, United States of America
  • Aditya Deshpande, Samsung Semiconductor Inc., United States of America
  • David D. Donofrio, Tactical Computing Laboratories, United States of America
  • Jayesh Iyer, Esperanto Technologies, United States of America
  • Nikhil Jain, NVIDIA, United States of America
  • Stefan Knecht, Algorithmiq, Germany
  • Kalyan Kumaran, Argonne National Laboratory, United States of America
  • Divya Prasad, AMD, United States of America
  • Roxana Rusitoru, Arm, United Kingdom
  • Jaehoon Yu, SAIT, South Korea